Simulate an RC Low-Pass Filter: Cutoff, Gain & Phase

An RC low-pass filter is one of the foundational building blocks of analog electronics. Whether you are conditioning sensor inputs, stripping high-frequency PWM switching ripples, or preventing anti-aliasing errors before an analog-to-digital converter (ADC), a single resistor and capacitor provide an elegant first-order filter.

However, moving from textbook formulas to practical hardware often introduces surprises. Many engineers calculate a 1 kHz cutoff frequency on paper, only to find their real circuit attenuating signals prematurely or shifting cutoff frequencies unexpectedly when connected to an ADC or amplifier.

In this tutorial, we will design an ideal first-order RC low-pass filter targeting approximately 1 kHz, calculate its theoretical cutoff, gain, and phase, verify the response with SPICE simulation, and investigate the classic trap: what happens when you connect a real-world load resistor to the output.

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1. How Does a First-Order RC Low-Pass Filter Work?

A passive first-order RC low-pass filter consists of a resistor ($R$) connected in series between the input source and the output node, with a capacitor ($C$) connected from the output node to ground.

The frequency selectivity comes from the capacitive reactance ($X_C$), which represents the capacitor's effective impedance to alternating current:

\[X_C = \frac{1}{2 \pi f C}\]

Because reactance is inversely proportional to signal frequency $f$:

• At DC and low frequencies: The capacitor behaves like an open circuit ($X_C \to \infty$). Negligible current flows through the series resistor, meaning output voltage closely tracks input voltage ($V_{\text{out}} \approx V_{\text{in}}$).
• At high frequencies: The capacitor's reactance drops ($X_C \to 0$), shunting alternating signals to ground and attenuating high-frequency noise.

In the frequency domain, the complex transfer function for an unloaded first-order filter is:

\[H(s) = \frac{V_{\text{out}}(s)}{V_{\text{in}}(s)} = \frac{1}{1 + sRC} = \frac{1}{1 + j\omega RC}\]

The magnitude of this transfer function determines circuit gain, while its complex angle determines output phase shift relative to the input signal.

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2. Calculating the Cutoff Frequency ($f_c$)

The corner or cutoff frequency ($f_c$) occurs where the resistance equals the capacitive reactance ($R = X_C$):

\[R = \frac{1}{2 \pi f_c C} \implies f_c = \frac{1}{2 \pi R C}\]

Let's design a filter targeting a 1 kHz cutoff using standard, easily sourced components:

• Select a standard capacitor value: $C = 10\text{ nF}$ ($10 \times 10^{-9}\text{ F}$).
• Solve for resistance: $R = \frac{1}{2 \pi \times 1000\text{ Hz} \times 10 \times 10^{-9}\text{ F}} \approx 15.92\text{ k}\Omega$.
• Pick the closest standard 1% resistor: $R = 16\text{ k}\Omega$.

Recalculating the pole frequency with our selected standard values yields:

\[f_c = \frac{1}{2 \pi \times 16{,}000\ \Omega \times 10 \times 10^{-9}\text{ F}} \approx 994.7\text{ Hz}\]

This sits within 0.5% of our 1 kHz design goal. You can also calculate custom component pairings using our free interactive RC filter calculator.

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3. What Actually Happens at the Cutoff Frequency?

A common point of confusion in analog electronics is the definition of the "$-3\text{ dB}$ point":

• Voltage Magnitude Ratio: At $f = f_c$, the denominator magnitude is $|1 + j(1)| = \sqrt{1^2 + 1^2} = \sqrt{2}$. Therefore $|H(j\omega_c)| = \frac{1}{\sqrt{2}} \approx 0.7071$. The output voltage amplitude is 70.71% of the input amplitude, representing a 29.29% drop in voltage amplitude, not a 50% drop.
• The −3.01 dB Attenuation: Expressed as a voltage gain in decibels, $20 \log_{10}(0.7071) \approx -3.01\text{ dB}$. In RF and matched-impedance power systems (such as $50\ \Omega$ lines), a $-3.01\text{ dB}$ drop corresponds to half-power ($P \propto V^2$). However, for an unloaded high-impedance RC filter terminating on an ideal capacitor, the circuit dissipates no active real power ($P_{\text{avg}} = 0$). The fundamental physical metric is the voltage ratio ($0.7071\times$).
• Phase Shift: The output voltage across the capacitor lags the input voltage. At the cutoff frequency, the phase angle is $\theta = -\arctan(\omega / \omega_c) = -\arctan(1) = -45.0^\circ$. At frequencies well above cutoff, the phase shift approaches a maximum lag of $-90^\circ$.

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4. The Engineering Trap: Adding an Output Load Resistor

Textbook equations assume an unloaded circuit driving an infinite input impedance. In real-world circuits, your filter connects to a downstream stage—such as an analog sensor buffer, an amplifier, or an ADC pin—with a finite load resistance ($R_L$).

Let's see what happens when we connect a $10\text{ k}\Omega$ load resistor ($R_L$) from the output node to ground in parallel with our $10\text{ nF}$ capacitor.

A. Passband Gain Drops Below Unity

At low frequencies (where capacitor reactance is large), the circuit behaves like a standard resistive voltage divider formed by $R = 16\text{ k}\Omega$ and $R_L = 10\text{ k}\Omega$:

\[A_{v,\text{low}} = \frac{R_L}{R + R_L} = \frac{10\text{ k}\Omega}{16\text{ k}\Omega + 10\text{ k}\Omega} = \frac{10}{26} \approx 0.3846\]

In decibels, your low-frequency passband is attenuated by $20 \log_{10}(0.3846) \approx -8.30\text{ dB}$. Your signal has lost over 61% of its voltage amplitude before any frequency filtering even takes place! For more on resistive loading, see our guide on why voltage dividers drop under load.

B. The Pole Frequency Shifts Higher

The capacitor no longer sees just $R$; it sees the parallel Thevenin equivalent resistance of $R$ and $R_L$:

\[R_{\text{eq}} = R \parallel R_L = \frac{16\text{ k}\Omega \times 10\text{ k}\Omega}{16\text{ k}\Omega + 10\text{ k}\Omega} \approx 6.154\text{ k}\Omega\]

The new characteristic pole frequency ($f_p$) shifts from 995 Hz up to:

\[f_p = \frac{1}{2 \pi R_{\text{eq}} C} = \frac{1}{2 \pi \times 6154\ \Omega \times 10 \times 10^{-9}\text{ F}} \approx 2{,}586\text{ Hz}\]

Connecting a $10\text{ k}\Omega$ load shifted the filter's characteristic pole frequency by more than 2.5× higher!

C. Pole Frequency vs. Absolute −3 dB Point

It is important to distinguish between the pole frequency and the absolute $-3\text{ dB}$ point:

• At the new pole frequency ($f_p \approx 2.59\text{ kHz}$), the output drops to $1/\sqrt{2}$ ($-3.01\text{ dB}$) relative to its loaded passband: $V_{\text{out, peak}} = 0.3846 \times 0.7071 \approx 0.272\text{ V}$ ($-11.31\text{ dB}$ relative to input).
• An absolute $-3\text{ dB}$ point (where $V_{\text{out}} = 0.707\times V_{\text{in}}$) does not exist on this loaded circuit, because the DC passband itself is already attenuated to $-8.30\text{ dB}$.

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5. Measured SPICE Simulation Results

To verify the mathematical models, we performed transient time-domain simulations using real ngspice across both circuit configurations, driven by a 1.0 V peak sinusoidal input.

In time-domain transient simulation, phase lag $\theta$ is extracted from the time delay ($\Delta t$) between zero-crossings of the input and output waveforms: $\theta = -(\Delta t / T) \times 360^\circ$. At the $994.7\text{ Hz}$ cutoff ($T \approx 1005.3\,\mu\text{s}$), the output zero-crossing lags the input by exactly $125.7\,\mu\text{s}$ (one-eighth of a cycle), confirming the exact $-45.0^\circ$ phase shift. At 10 kHz (one decade above cutoff), the unloaded filter demonstrates the classic first-order rolloff rate of -20 dB per decade.

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6. How to Build and Simulate the Filter in CircuPilot

You can assemble and simulate this circuit in your browser without desktop software:

• Place Components: From the left palette, drag an AC Voltage Source (VAC), a Resistor (R), a Capacitor (C), and a Ground (GND) terminal onto the canvas.
• Configure Values: Click the resistor and set its value to 16k. Set the capacitor to 10n.
• Set Source Parameters: Click the AC source to open its settings in the inspector: set Amplitude to 1 and Frequency to 1000 (1 V peak at 1 kHz).
• Connect Oscilloscope: Drag an Oscilloscope (2-CH) from the Instruments palette (Osc). Wire Channel A to the input node and Channel B to the filtered output node.
• Observe Waveforms: Press Run. The oscilloscope panel automatically expands at the bottom. Channel B shows the attenuated sine wave (~0.707 V) and the visible ~125 µs (-45°) time lag relative to Channel A.
• Test Loading: Add a 10k resistor in parallel with the capacitor to observe the amplitude immediately drop and the phase lag shrink.

Open Pre-wired Circuit: You can immediately inspect this verified circuit with one click via our share link: Open the RC Low-Pass Filter Simulation in CircuPilot. If you prefer to design a custom variation using plain English, you can also launch the AI circuit generator with a pre-filled prompt.

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7. Common RC Filter Mistakes

• Neglecting Source Impedance: If your signal generator or sensor has significant internal resistance (e.g., $1\text{ k}\Omega$), it adds directly to $R$, lowering your cutoff frequency.
• Ignoring Downstream Loading: Connecting the filter directly to a low-impedance load alters both passband gain and cutoff frequency. Use a high-impedance op-amp buffer (voltage follower) between the filter and heavy loads.
• Choosing Extreme Component Values: While a $1.6\ \Omega$ resistor and a $100\ \mu\text{F}$ capacitor theoretically give a 1 kHz cutoff, drawing large AC currents through a $1.6\ \Omega$ resistor overloads signal sources. Aim for resistors in the $1\text{ k}\Omega$ to $100\text{ k}\Omega$ range.
• Capacitor Dielectric Losses: For precision audio or analog filtering, standard high-K ceramic capacitors (such as Y5V or Z5U) exhibit significant capacitance changes with temperature and DC bias. Use C0G/NP0 ceramic, polypropylene, or film capacitors for stable filter responses.

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Summary

Designing a passive RC low-pass filter requires balancing component choices with real-world operating conditions:

• The ideal unloaded cutoff is $f_c = 1 / (2 \pi RC)$, where output amplitude drops to $0.7071\times$ ($-3.01\text{ dB}$) and phase lags by $-45^\circ$.
• Adding an output load resistor creates a voltage divider that lowers passband gain ($R_L / (R + R_L)$) and shifts the pole frequency higher based on $R_{\text{eq}} = R \parallel R_L$.
• Always verify your designs under realistic loading conditions using SPICE simulation or buffer the output with an operational amplifier.

For more step-response and time-domain analysis, check out our tutorial on RC time constant charge and discharge simulation.

Frequently asked questions

What is the cutoff frequency of an RC low-pass filter?

For an ideal unloaded first-order RC low-pass filter, the cutoff frequency is fc = 1 / (2*pi*R*C). At this frequency, the output amplitude falls to 1/sqrt(2) (approximately 0.7071) of the input voltage, representing an attenuation of -3.01 dB.

Why does adding a load resistor shift the pole frequency higher?

The load resistor connects in parallel with the capacitor from the perspective of AC signal analysis. This reduces the equivalent Thevenin resistance seen by the capacitor (Req = R

Does -3 dB mean the output voltage is 50%?

No. A -3.01 dB change in voltage amplitude corresponds to a factor of 1/sqrt(2) or 70.71%, which is a 29.29% reduction in voltage amplitude. A 50% voltage drop would be -6.02 dB.

What is the difference between pole frequency and absolute -3 dB point on a loaded filter?

The pole frequency fp is where the filter response drops by -3 dB relative to its low-frequency passband. Because a loaded filter already suffers an immediate passband drop due to resistive division, its total attenuation at the pole is deeper (e.g. -11.31 dB relative to input).