Simulate Logic Gates Online and Check the Truth Table

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✍️ By CircuPilot Team
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Seven gates, four rows each, and an answer you can check against the table in your notes. This is the shortest useful thing a digital-logic simulator can do, and it takes about a minute in a browser.

The seven gates and what they output

Two inputs, A and B, and a threshold: above about half the supply reads HIGH, below it reads LOW.

ABANDORNANDNORXORXNOR
00001101
01011010
10011010
11110001

NOT has one input and inverts it. The pattern worth memorising is that NAND and NOR are the inverses of AND and OR, and XNOR is the inverse of XOR — a bubble on the output of a gate symbol always means "and then invert".

Two of these are worth singling out because they behave in ways beginners find surprising:

  • NOR outputs HIGH only when both inputs are LOW. It is the gate that is on when nothing else is. That property is why NOR is the building block of the classic SR latch.
  • XNOR is an equality detector. Its output is HIGH when the inputs match, which makes it the comparator bit in any circuit that has to check whether two values are the same.

Build one and drive it

The fastest route is to describe it. In CircuPilot, typing

> an AND gate with two 5 V inputs and a 1 k resistor on the output

gives you a schematic you can edit. Then set one input source to 0 V, run it, and read the output node. Four runs gives you the row-by-row truth table for that gate, measured rather than recited.

The netlist behind it is plain SPICE — each gate becomes a behavioural source with a threshold:

V1 a 0 5
V2 b 0 0
BG1 out 0 V={(V(a)>2.5)&&(V(b)>2.5)?5:0}
R1 out 0 1k
.end

That is the AND gate. The expression is the truth table, written as a condition. It is worth looking at once, because it shows there is nothing magical inside a logic gate in a simulator — a comparison, and two output levels.

The mistake that makes a gate look broken

Leaving the output floating. A gate with nothing attached to its output has no path for current, and depending on the simulator you get a meaningless voltage, a convergence error, or a flat zero that looks like a broken gate.

Put a resistor from the output to ground — 1 kΩ is fine — or connect the output to whatever it is actually driving. This is the single most common reason a first digital circuit "does not work", and it is not the gate's fault.

The same applies to inputs. An unconnected input is not a LOW input. In a real chip it floats to whatever noise is nearby and the output flickers; in a simulator it is simply undefined. Every input needs a source, a pull-up, or a pull-down.

Where the 74xx part numbers come in

If you have seen 74LS00 or 74HC02 in a lab sheet, those are packages, not gates. One chip holds several independent gates:

partcontains
74LS00four NAND gates
74LS02four NOR gates
74LS04six inverters (NOT)
74LS08four AND gates
74LS32four OR gates
74LS86four XOR gates

The four gates in a 74LS00 share one VCC pin and one GND pin, and schematics label them U1:A through U1:D. For understanding the logic, the packaging does not matter at all — a NAND gate is a NAND gate. It starts mattering when you buy parts or lay out a board, because it decides how many chips you need.

One real difference hides in the letters. 74LS is TTL and 74HC is CMOS, and they switch at different input voltages — roughly 1.5 V for LS against half the supply for HC. A circuit that works with one family can misbehave with the other at the same supply voltage.

What a simulator will not tell you

Being honest about the limits, because they are the things that bite on a breadboard:

  • Propagation delay. A real gate takes nanoseconds to respond. A behavioural model switches instantly, so timing hazards, glitches and race conditions in sequential logic do not appear.
  • Fan-out and drive current. A real output can only drive so many inputs.
  • Supply behaviour. The model above hard-codes 5 V out and ignores the supply rails entirely.

For learning what a gate does and checking a truth table, none of that matters. For a design that has to meet timing, it does.

Try it

All seven gates are in the palette under Digital Logic, and the simulation runs on real ngspice rather than an approximation, so the netlist above is what actually executes.

Open the simulator →

If your circuit refuses to solve at all, the cause is usually a missing ground or a floating node — that has its own guide.